2 項進行中

115-1 選課時程

進行中

  • 初選第一階段 6/15 – 6/18
  • 初選第二階段 6/22 – 6/25
  • 校際選修 進行中 8/24 – 9/18
  • 初選第三階段 8/31 – 9/3
  • 開學後加退選 進行中 9/7 – 9/21
  • 逾期加退選 9/21 – 9/24
選課資源

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低介電材料及製程技術

Low-K Materials and Processing Technologies

學期
106-1
學分
0 學分
當期課號
5331
永久課號
IMA5509
開課單位
材料科學與工程學系
授課教師
呂志鵬
校區
光復
類別
選修
上課時間表
週二
1
08:00–08:50
低介電材料及製程技術
EF202(光復)
3 節連堂
2
09:00–09:50
3
10:10–11:00

* 根據陽明交大上課時間表所列

概述

This is a unique course covering the fundamental material design, its applications and problem solving. This course is intended for graduate and senior students who have background in semiconductor processing, chemistry and physics. Major topics include: (1) RC delay in interconnects, (2) low-dielectric constant materials, (3)characterization and structure-property, (4) key processing modules such as patterning, metallization and CMP, (5) ALD technology, (6) far-backend, (7) die/package interactions and reliability, and (8) future challenges. 目標: 1. 瞭解介電材料在後段連接(Interconnects)之角色, 其物化特性,製程技術及整合 2. 瞭解介電材料front-end gate dielectrics之角色, 其物化特性,製程技術及整合 3. 後段連接製程技術 4. 藉由實例討論及分組專題製作,增進團隊分工合作素養, 以應付未來產業的挑戰 5. 輔助未來相關就業之準備 This course is offered in English. To balance students' needs, Chinese will be supplemented on as-needed basis. Note: 1. This course is recognized by NDL (Nano-Device Labs) as the prerequisite to use its facility. 2. The lecture notes have been updated to reflect the latest 14 nm technology. Double patterning, EUV, dual hardmask and metal hardmask integration schemes, extreme low-k, air-gap, self-forming-barrier, metal cap, fan-out wafer level package have been updated and added this year.

先修科目

None This course is offered in English

備註

無備註

教學方式

助教 (Teaching Assistant): Wei-Yuan Chang (EF702) ext. 55396

評分方式

No exam. 7 assigned homework (70%) (1-2 students are invited to present their homework and discussion) Final team project assignment: 30% (Presentation and report) Note: 1 Report should follow the format of J. of Applied Physics Note:2. Presentation is graded by peer (50%) and instructor (50%). with a forced distribution. Note 3 10 minutes lecture on Ethics in Science and Engineering is planned for this course in the opening session

課程大綱
  • Backend interconnect and device technology

    RC delay in interconnects, options to solve RC delays

    講授:
    3
    實作:
    1.5

    備註:reading key papers after class

  • Low k materials

    1. Dielectric materials 2. Si-based materials 3. polymer-based materials 4. Etch-stop and passivation

    講授:
    12
    實作:
    4.5
  • characterization and structure-property

    1. Properties and Requirements 2. Characterization techniques

    講授:
    6
    實作:
    1.5
    其他:
    3

    備註:口頭報告 oral presentation

  • Processing Technologies

    1. Litho 2. Etch and Clean 3. Metallization 4. CMP

    講授:
    12
    實作:
    3
  • Emerging ALD technology

    ALD

    講授:
    3
  • Futuristic interconnect technology

    Porous low-k, 3-D, aig-gap

    講授:
    3
    其他:
    3

    備註:oral presentation

  • High-k dielectrics

    Front-end gate technology

    講授:
    3
週次計畫
週次主題
第 1 週

Overview of Backend Interconnects

9/12(二) ABC-EF202
第 2 週

Class will be re-scheduled

2017/9/19 (二)ABC-EF202
第 3 週

Overview on Interconnect Delay and Technology Options

2017/9/26 (二)ABC-EF202
第 4 週

Low-k Dielectric Materials: Properties and Requirements Fundamentals of Dielectrics

2017/10/3 (二)ABC-EF202
第 5 週

National Holiday

2017/10/10(二)ABC-EF202
第 6 週

Si-based Dielectric Materials – 1

2017/10/17(二)ABC-EF202
第 7 週

Si-based and Polymeric Dielectric Materials

2017/10/24(二)ABC-EF202
第 8 週

Characterization of low-k materials

2017/10/31(二)ABC-EF202
第 9 週

Presentation/Discussion Homework assignment

2017/11/7 (二)ABC-EF202
第 10 週

Etch Stop and Passivation Dielectrics / Integration

2017/11/14(二)ABC - EF202
第 11 週

Module - Lithography

2017/11/21(二)ABC-EF202
第 12 週

Modules - Etch/Clean Technology

2017/11/28(二)ABC-EF202
第 13 週

Students' Presentation on Characterization Techniques

2017/12/5 (二)ABC-EF202
第 14 週

Modules – Metallization (Thin film/ALD, CMP.)

2017/12/12(二)ABC-EF202
第 15 週

Chemical-mechanical polish (CMP)

2017/12/19(二)ABC-EF202
第 16 週

Futuristic technologies for Interconnects, Materials Options and Challenges

2017/12/26(二)ABC EF202
第 17 週

- Materials and integration Options/Porous low-k dielectrics

2018/1/2 (二)ABC-EF202
第 18 週

Final Presentation

2018/1/9 (二)ABC-EF202
教科書

Textbook: Advanced Interconnects for ULSI Technology, Edited by M.R. Baklanov, P.S. Ho, and E. Zschech, Wiley & Son, United Kingdom (2012) References: 1. Interlayer Dielectrics for Semiconductor Technologies, Eds. By S. P. Muraka, M. Eizenberg, and A.K. Sinha, Academic Press (2004) 2. Dielectric Films for Advanced Microelectronics, Eds. by Mikhail Baklanov, Karen Maex, Martin Green, John Wiley & Sons, New York (2007) 3. Silicon VLSI Technology: Fundamentals, Practice and Modeling, J.D. Plummer, M. D. Deal and P.B. Griffin, Prentice Hall, New Jersey (2000) 4. S.O. Kasap, Principles of Electronic Materials and Devices, The McGraw-Hill Company, 3rd Edition (International Edition), Singapore (2006) 5. Low Dielectric Constant Materials for IC Applications, Eds. by P.S. Ho, J. Leu and W.W. Lee, Springer Verlag (2003) 6. Class notes and literatures relevant to low-k technologies

Office Hours
地點
EF316
時間
Mondays 2-3 pm
聯絡方式
(03) 5131420