超大型積體電路導論

This course introduces CMOS VLSI manufacturing process, circuit layout, and CMOS combinational and sequential digital circuit design.

Logic design, Microelectronic circuits I and II.

無備註

All course related information will be announced on E3.

小考40%、期中考30%、期末30%

• Introduction

  Introduction to baisc VLSI design flow and concepts

  講授：

  3

  備註：Chapter 1 and 2

• Basic CMOS logics

  Compound standard CMOS gate design

  講授：

  3

  備註：Chapter 1

• CMOS fabrication process

  Introduction to how CMOS IC is fabricated and what masks are.

  講授：

  3

  備註：Chapter 15

• Circuit layout

  Introduction to how to draw circuit layouts

  講授：

  3

  備註：Chapter 1

• CMOS transistor's characteristics

  Transistor's I/V characteristics and nonideality

  講授：

  3

  備註：Chapter 2

• Speed

  Estimation of digital circuit's speed

  講授：

  3

  備註：Chapter 3 Speed

• Logic efforts

  Handling Fan-in and Fan-out of logic gates

  講授：

  3

  備註：Chapter 3 Speed

• Interconnection

  interconnections in IC and their influences

  講授：

  3

  備註：Chapter 5 Wires

• Power

  Estimation of digital circuit's power

  講授：

  3

  備註：Chapter 4 Power

• Combination circuits

  Standard CMOS combinational gate design

  講授：

  3

  備註：Chapter 8

• Circuit Families

  Introduction to various CMOS combinational gate families

  講授：

  3

  備註：Chapter 8

• Sequential circuit design

  static and dynamic latches, flip-flops, and sequential circuit design

  講授：

  3

  備註：Chapter 9

• Memory

  SRAM and serial access memories

  講授：

  3

  備註：Chapter 11

• Adders

  Introduction to various implementations of adders

  講授：

  3

  備註：Chapter 10

• Data path functions

  Common functional circuits in data path

  講授：

  3

  備註：Chapter 10

• Array circuits

  CAM, ROM, PLA

  講授：

  3

  備註：Chapter 11

• I/O, packaging, and power/clock buses

  Design considerations to prepare a complete chip for tapeout

  講授：

  3

  備註：Chapter 12 (optional)

Neil H. E. Weste and D. M. Harris, Integrated Circuit Design, Fourth Edition, Pearson Education Inc.

地點

EE705

時間

16:30 to 17:30, every Tuesday

聯絡方式

ext. 54375 hchong@mail.nctu.edu.tw