類比積體電路II
Analog Circuit Design II
| 節 | 週二 |
|---|---|
2 09:00–09:50 | 類比積體電路II EE116（光復） 3 節連堂 |
3 10:10–11:00 | |
4 11:10–12:00 |
* 根據陽明交大上課時間表所列
This course provides lectures on analog CMOS integrated circuits. In the course, the remaining chapters of the book (from Chapters 10 to 189) will be covered. Advanced analog circuits such as switched circuits, oscillators, and PLLs will be explained.
Microelectronic circuits, Semiconductor devices, Electrical engineering
無備註
Handouts will be uploaded on the E3 website.
Attendance: 15 % Homework/presentation: 20 % Midterm exam: 25 % Final exam: 40 %
教師未提供此項資料
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction and Review (1/2) 9/13 |
| 第 2 週 | Introduction and Review (2/2) 9/20 |
| 第 3 週 | Ch10. Stability and Frequency Compensation (1/2) 9/27 |
| 第 4 週 | Ch10. Stability and Frequency Compensation (2/2) 10/4 |
| 第 5 週 | Ch11. Bandgap References 10/11 |
| 第 6 週 | Ch12. Introduction to Switched-Capacitor Circuits (1/2) 10/18 |
| 第 7 週 | Ch12. Introduction to Switched-Capacitor Circuits (2/2) 10/25 |
| 第 8 週 | Midterm exam 11/1 |
| 第 9 週 | Ch13. Nonlinearity and Mismatch 11/8 |
| 第 10 週 | Ch14. Oscillators (1/2) 11/15 |
| 第 11 週 | Ch14. Oscillators (2/2) 11/22 |
| 第 12 週 | Ch15. Phase-Locked Loops (1/2) 11/29 |
| 第 13 週 | Ch15. Phase-Locked Loops (2/2) 12/6 |
| 第 14 週 | Ch16. Short-Channel Effects and Device Models 12/13 |
| 第 15 週 | Ch17. CMOS Processing Technology 12/20 |
| 第 16 週 | Final Exam (no class) 12/27 |
Razavi, B. (2002). Design of Analog CMOS Integrated Circuits. Tata McGraw-Hill Education.
- 地點
- Room #301, MIRC Bldg.
- 時間
- Wednesdays 11 am to 12 am
- 聯絡方式
- dkyoon@nctu.edu.tw