超大型積體電路導論
Introduction to VLSI Circuits
| 節 | 週二 | 週四 |
|---|---|---|
7 15:30–16:20 | 超大型積體電路導論 EE102（光復） 2 節連堂 | |
8 16:30–17:20 | 超大型積體電路導論 EE102（光復） |
* 根據陽明交大上課時間表所列
This course introduces CMOS VLSI manufacturing process, circuit layout, and CMOS combinational and sequential digital circuit design.
Logic design, Microelectronic circuits I and II.
無備註
All course related information will be announced on E3.
小考34%、期中考33%、期末考33%
Introduction
Introduction to baisc VLSI design flow and concepts
- 講授：
- 3
備註：Chapter 1 and 2
Basic CMOS logics
Compound standard CMOS gate design
- 講授：
- 3
備註：Chapter 1
CMOS fabrication process
Introduction to how CMOS IC is fabricated and what masks are.
- 講授：
- 3
備註：Chapter 15
Circuit layout
Introduction to how to draw circuit layouts
- 講授：
- 3
備註：Chapter 1
CMOS transistor's characteristics
Transistor's I/V characteristics and nonideality
- 講授：
- 3
備註：Chapter 2
Speed
Estimation of digital circuit's speed
- 講授：
- 3
備註：Chapter 3 Speed
Logic efforts
Handling Fan-in and Fan-out of logic gates
- 講授：
- 6
備註：Chapter 3 Speed
Interconnection
interconnections in IC and their influences
- 講授：
- 3
備註：Chapter 5 Wires
Power
Estimation of digital circuit's power
- 講授：
- 3
備註：Chapter 4 Power
Combination circuits
Standard CMOS combinational gate design
- 講授：
- 6
備註：Chapter 8
Circuit Families
Introduction to various CMOS combinational gate families
- 講授：
- 6
備註：Chapter 8
Sequential circuit design
static and dynamic latches, flip-flops, and sequential circuit design
- 講授：
- 6
備註：Chapter 9
Adders
Introduction to various implementations of adders
- 講授：
- 3
備註：Chapter 10
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction to baisc VLSI design flow and concepts 2023-09-12(二),2023-09-14(四) |
| 第 2 週 | Compound standard CMOS gate design 2023-09-19(二),2023-09-21(四) |
| 第 3 週 | Introduction to how CMOS IC is fabricated and what masks are. 2023-09-26(二),2023-09-28(四) |
| 第 4 週 | Introduction to how to draw circuit layouts 2023-10-03(二),2023-10-05(四) |
| 第 5 週 | Transistor's I/V characteristics and nonideality 2023-10-10(二),2023-10-12(四) |
| 第 6 週 | Estimation of digital circuit's speed 2023-10-17(二),2023-10-19(四) |
| 第 7 週 | Handling Fan-in and Fan-out of logic gates 2023-10-24(二),2023-10-26(四) |
| 第 8 週 | Handling Fan-in and Fan-out of logic gates mid-term exam. 2023-10-31(二),2023-11-02(四) |
| 第 9 週 | Interconnections in IC and their influences 2023-11-07(二),2023-11-09(四) |
| 第 10 週 | Estimation of digital circuit's power 2023-11-14(二),2023-11-16(四) |
| 第 11 週 | Standard CMOS combinational gate design 2023-11-21(二),2023-11-23(四) |
| 第 12 週 | Standard CMOS combinational gate design Introduction to various CMOS combinational gate families 2023-11-28(二),2023-11-30(四) |
| 第 13 週 | Introduction to various CMOS combinational gate families 2023-12-05(二),2023-12-07(四) |
| 第 14 週 | static and dynamic latches, flip-flops, and sequential circuit design 2023-12-12(二),2023-12-14(四) |
| 第 15 週 | Introduction to various implementations of adders 2023-12-19(二),2023-12-21(四) |
| 第 16 週 | Final exam. 2023-12-26(二),2023-12-28(四) |
Neil H. E. Weste and D. M. Harris, Integrated Circuit Design, Fourth Edition, Pearson Education Inc.
- 地點
- EE705
- 時間
- 14:30 to 15:20, every Tuesday
- 聯絡方式
- ext. 54375 hchong@nycu.edu.tw