進階電子設計自動化

Advanced EDA Topics

學期

112-2

學分

0 學分

當期課號

539002

永久課號

IIPS30021

開課單位

前瞻半導體研究所

授課教師

林柏宏

校區

光復

類別

選修

上課時間表

節	週三
5 13:20–14:10	進階電子設計自動化 ED202（光復） 3 節連堂
6 14:20–15:10
7 15:30–16:20

* 根據陽明交大上課時間表所列

概述

This course will explore a wide spectrum of advanced EDA topics that span from fundamental geometric data structures for chip layouts to emerging trends in hardware security. It covers several important topics, including large-scale ECO routing, RDL routing in 3D ICs , optical routing in NoCs, analog layout synthesis, DFM and hotspot detection, advanced logic synthesis and verification, and EDA for hardware security. This course adopts a holistic approach, combining theoretical knowledge with practical implementation. Programming assignments, group projects, and case studies will provide you with a practical understanding of the concepts discussed in the lectures.

先修科目

Python/C/C++ programming (mandatory), Data structures (nice to have), Algorithms or AI/ML (nice to have), VLSI design (nice to have), Introduction to EDA (nice to have)

備註

無備註

教學方式

教師未提供此項資料

評分方式

Programming labs 60% Quiz/Exam 20% Term project 20%

課程大綱

Geometric data structures for chip layouts

KD-tree, R-tree, Cornerstitching, Voronoi diagram, Delaunay triangulation
Large-scale ECO routing
RDL routing in 3D ICs
Optical routing in NoCs
Analog layout synthesis

Circuit structure analysis, analog placement, analog routing, P&R for RFICs
Layout synthesis with FinFETs
DFM & Hotspot detection
Advanced logic synthesis and verification
EDA for Hardware security
Introduction

週次計畫

週次	主題
第 1 週	Introduction 2024-02-21(三)
第 2 週	Geometric data structures for chip layouts KD-tree, R-tree, Cornerstitching, Voronoi diagram, Delaunay triangulation 2024-02-28(三)
第 3 週	Geometric data structures for chip layouts KD-tree, R-tree, Cornerstitching, Voronoi diagram, Delaunay triangulation 2024-03-06(三)
第 4 週	Large-scale ECO routing 2024-03-13(三)
第 5 週	Large-scale ECO routing 2024-03-20(三)
第 6 週	RDL routing in 3D ICs 2024-03-27(三)
第 7 週	RDL routing in 3D ICs 2024-04-03(三)
第 8 週	Optical routing for NoCs 2024-04-10(三)
第 9 週	Optical routing for NoCs 2024-04-17(三)
第 10 週	Analog layout synthesis Circuit structure analysis, analog placement, analog routing, P&R for RFICs 2024-04-24(三)
第 11 週	Analog layout synthesis Circuit structure analysis, analog placement, analog routing, P&R for RFICs 2024-05-01(三)
第 12 週	Analog layout synthesis Circuit structure analysis, analog placement, analog routing, P&R for RFICs 2024-05-08(三)
第 13 週	Layout synthesis with FinFETs 2024-05-15(三)
第 14 週	DFM & Hotspot detection 2024-05-22(三)
第 15 週	Advanced logic synthesis and verification 2024-05-29(三)
第 16 週	EDA for Hardware security 2024-06-05(三)

教科書

Refence books: 1.Electronic Design Automation by Wang, Chang, and Cheng 2.Electronic design automation for IC implementation, circuit design, and process technology: circuit design, and process technology by Lavagno, Markov, Martin, and Scheffer

Office Hours

地點: EF369 or Webex
時間: By appointment
聯絡方式: mphlin@nycu.edu.tw