邏輯設計【英文班】
Logic Design
| 節 | 週二 | 週五 |
|---|---|---|
3 10:10–11:00 | 邏輯設計【英文班】 ED219（光復） 2 節連堂 | |
4 11:10–12:00 | ||
5 13:20–14:10 | 邏輯設計【英文班】 ED219（光復） |
* 根據陽明交大上課時間表所列
This course offers an introduction to any undergraduate who wants to understand digital systems. This course is essential for later courses in digital design, computer architecture, and design automation.
None
無備註
教師未提供此項資料
Grading Policy: Homework: 20% Quizzes: 20% Exams: 60% (Exam1: 30%, Exam2: 30%)
Number Systems and Conversion
- 講授：
- 3
Boolean Algebra
- 講授：
- 3
Algebraic Simplification
- 講授：
- 3
Applications of Boolean Algebra
- 講授：
- 3
Karnaugh Maps
- 講授：
- 3
Multi-Level Gate Networks NAND and NOR Gates
- 講授：
- 3
Combinational Circuits Design and Simulation Using Gates
- 講授：
- 3
Multiplexers, Decoders, and Programmable Logic Arrays
- 講授：
- 3
Latches and Flip-Flops
- 講授：
- 3
Registers and Counters
- 講授：
- 3
Analysis of Clocked Sequential Networks
- 講授：
- 3
Derivation of State Graphs and Tables
- 講授：
- 3
Reduction of State Tables/State Assignment
- 講授：
- 3
Sequential Circuit Design
- 講授：
- 3
| 週次 | 主題 |
|---|---|
| 第 1 週 | Number Systems and Conversion 2024-09-03(二),2024-09-06(五) |
| 第 2 週 | Boolean Algebra 2024-09-10(二),2024-09-13(五) |
| 第 3 週 | Algebraic Simplification 2024-09-17(二),2024-09-20(五) |
| 第 4 週 | Applications of Boolean Algebra 2024-09-24(二),2024-09-27(五) |
| 第 5 週 | Karnaugh Maps 2024-10-01(二),2024-10-04(五) |
| 第 6 週 | Multi-Level Gate Networks NAND and NOR Gates 2024-10-08(二),2024-10-11(五) |
| 第 7 週 | Combinational Circuits Design and Simulation Using Gates 2024-10-15(二),2024-10-18(五) |
| 第 8 週 | Exam1 2024-10-22(二),2024-10-25(五) |
| 第 9 週 | Multiplexers, Decoders, and Programmable Logic Arrays 2024-10-29(二),2024-11-01(五) |
| 第 10 週 | Latches and Flip-Flops 2024-11-05(二),2024-11-08(五) |
| 第 11 週 | Registers and Counters 2024-11-12(二),2024-11-15(五) |
| 第 12 週 | Analysis of Clocked Sequential Networks 2024-11-19(二),2024-11-22(五) |
| 第 13 週 | Derivation of State Graphs and Tables 2024-11-26(二),2024-11-29(五) |
| 第 14 週 | Reduction of State Tables/State Assignment 2024-12-03(二),2024-12-06(五) |
| 第 15 週 | Sequential Circuit Design 2024-12-10(二),2024-12-13(五) |
| 第 16 週 | 2024-12-17(二),2024-12-20(五) |
C. H. Roth, Jr. and L. Kinney, Fundamentals of Logic Design, 7th edition, Cengage, 2014.
- 地點
- ED402
- 時間
- Thursdays 3~4pm. Or by appointment.
- 聯絡方式
- bclai@nycu.edu.tw