記憶體積體電路
Memory Circuit Design
| 節 | 週一 |
|---|---|
5 13:20–14:10 | 記憶體積體電路 ED101（光復） 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
課程概述與目標: Part 1: SRAM Circuits (i) Structures, layout, and operations (READ/WRITE strategies) of 6T-SRAM Cells. (ii) Peripheral circuits and array arrangement of 6T-SRAM MACRO and Assisted-circuits for Low-power SRAM Designs. (iii) Variants of SRAM Cells: 8T-SRAM cells, Registers, CAM, T-CAM, SRAM-latches and buffers. (iv) Design challenges and techniques of FinFET-based SRAM Cells. (v) SRAM Designs beyond the FinFETs: Nano-sheet SRAM cells and CFET SRAM cells. (vi) SRAM-based Computing-in-memory. Part 2: DRAM Circuits (i) Evolution of 1T1C DRAM cells from perspectives of the materials, devices, and structures. (ii) Structures, layout, and operations (READ/WRITE/REFRRESH strategies) of 1T1C DRAM Cells. (iii) Peripheral circuits and array arrangement of 1T1C DRAM MACRO. (iv) DDR and GDDR: JEDEC, RUMBUS, Fully-buffered (PCIe), SDRAM, DDR, DLL, DCC, Prefetch, and so on. (v) 3D DRAM IC: Introduction of 3D-IC and High-bandwidth Memory (HBM). Part 3: NVM Circuits (i) OTP (ii) NOR FLASH (iii) NAND FLASH/ SSD (iv) Emerging memories: PCM, RRAM, MRAM, and Ferroelectric memories.
(1) Semiconductor Devices (2) VLSI Circuits
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助教、線上課程、電子書和電子期刊文獻
講授,作業,個人報告,期中/期末專案(projects)
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| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction to Memory Circuit Designs: Memory System Hierarchy, The principle of Locality, and Cache 2025-02-17(一) |
| 第 2 週 | Part 1: SRAM Circuits (i) Structures, layout, and operations (READ/WRITE strategies) of 6T-SRAM Cells. 2025-02-24(一) |
| 第 3 週 | Part 1: SRAM Circuits (ii) Peripheral circuits and array arrangement of 6T-SRAM MACRO and Assisted-circuits for Low-power SRAM Designs. 2025-03-03(一) |
| 第 4 週 | Part 1: SRAM Circuits (iii) Variants of SRAM Cells: 8T-SRAM cells, Registers, CAM, T-CAM, SRAM-latches and buffers. 2025-03-10(一) |
| 第 5 週 | Part 1: SRAM Circuits (iv) Design challenges and techniques of FinFET-based SRAM Cells. (v) SRAM Designs beyond the FinFETs: Nano-sheet SRAM cells and CFET SRAM cells. 2025-03-17(一) |
| 第 6 週 | Part 1: SRAM Circuits (vi) SRAM-based Computig-in-memory. 2025-03-24(一) |
| 第 7 週 | Part 2: DRAM Circuits (i) Evolution of 1T1C DRAM cells from perspectives of the materials, devices, and structures. 2025-03-31(一) |
| 第 8 週 | Part 2: DRAM Circuits (ii) Structures, layout, and operations (READ/WRITE/REFRRESH strategies) of 1T1C DRAM Cells. 2025-04-07(一) |
| 第 9 週 | Part 2: DRAM Circuits (iii) Peripheral circuits and array arrangement of 1T1C DRAM MACRO. 2025-04-14(一) |
| 第 10 週 | Part 2: DRAM Circuits (iv) DDR and GDDR: JEDEC, RUMBUS, Fully-buffered (PCIe), SDRAM, DDR, DLL, DCC, Prefetch, and so on. 2025-04-21(一) |
| 第 11 週 | Part 2: DRAM Circuits (v) 3D DRAM IC: Introduction of 3D-IC and High-bandwidth Memory (HBM). 2025-04-28(一) |
| 第 12 週 | Part 3: NVM Circuits (i) OTP 2025-05-05(一) |
| 第 13 週 | Part 3: NVM Circuits (ii) NOR FLASH 2025-05-12(一) |
| 第 14 週 | Part 3: NVM Circuits (iii) NAND FLASH/ SSD 2025-05-19(一) |
| 第 15 週 | Part 3: NVM Circuits (iv) Emerging memories: PCM, RRAM, MRAM, and Ferroelectric memories (1/2) 2025-05-26(一) |
| 第 16 週 | Part 3: NVM Circuits (iv) Emerging memories: PCM, RRAM, MRAM, and Ferroelectric memories (2/2) 2025-06-02(一) |
No textbook. The class materials are mainly based on papers published at international conferences and journals in recent years, supplemented with materials from invited tutorials and/or short courses that the professor gave at international conferences and workshops. All materials will be distributed and posted in the web as well.
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