VLSI實驗
VLSI Labs.
| 節 | 週二 |
|---|---|
A 18:30–19:20 | VLSI實驗 3 節連堂 |
B 19:30–20:20 | |
C 20:30–21:20 |
* 根據陽明交大上課時間表所列
This lab aims to teach the analysis and design techniques using VLSI technology and CAD tools. The coverage includes Introduction to VLSI Technology, Transistor Behavior, Logic Design, System Design and CAD Tools. Through hands-on layout practice, simulations and design projects, students will reinforce the layout design flow and problem-solving skills.
Digital Logic Design, Circuit Theory, Microelectronics
無備註
The lecture would be held at ED414、ED415
50% Lab Exercise 20% Midterm 30% Final project
教師未提供此項資料
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction to class and EDA environments 2025-09-02(二) |
| 第 2 週 | Lab 1 assignment and instruction of layout and simulation tools 2025-09-09(二) |
| 第 3 週 | Lab 1 discussions 2025-09-16(二) |
| 第 4 週 | Lab 1 Demo and announcement of Lab 2: Logic gates assignment 2025-09-23(二) |
| 第 5 週 | The National Day 2025-09-30(二) |
| 第 6 週 | Lab 2 Demo and announcement of Lab 3: Flip-Flop Design assignment 2025-10-07(二) |
| 第 7 週 | Lab 3 discussions 2025-10-14(二) |
| 第 8 週 | Lab 3 Demo and announcement of Lab 4: adder assignment 2025-10-21(二) |
| 第 9 週 | Midterm Exam (上機考) 2025-10-28(二) |
| 第 10 週 | Lab 4 discussions 2025-11-04(二) |
| 第 11 週 | Lab 4 demo and announcement of Lab 5: Multiplier assignment 2025-11-11(二) |
| 第 12 週 | Lab 5 discussions 2025-11-18(二) |
| 第 13 週 | Lab 5 Demo, Final Project announcement 2025-11-25(二) |
| 第 14 週 | Final Project Discussions 2025-12-02(二) |
| 第 15 週 | ADFP Finfet Lecture and Bonus Project Annoucement 2025-12-09(二) |
| 第 16 週 | Final Project Demo 2025-12-16(二) |
There is no textbook, lab material will be available in E3 System.
- 地點
- EE768, or online
- 時間
- Wednesday 3:30pm-5:30pm
- 聯絡方式
- Email: yudoliao@nycu.edu.tw TA: through E3 System