計算機架構
Computer Architecture
| 節 | 週二 |
|---|---|
5 13:20–14:10 | 計算機架構 EDB27（光復） 2 節連堂 |
6 14:20–15:10 |
* 根據陽明交大上課時間表所列
The slowdown of transistor scaling has led to diminishing performance improvements in standard computer systems. With the loss of exponentially increasing resources provided by semiconductor scaling, computer architects are facing significant challenges in maintaining the growth of computing power. This course begins with an introduction to advanced topics in conventional computer architecture and then explores the trends resulting from the end of Dennard Scaling and Moore's Law. These trends include the shift towards parallel computer architectures and systems, the integration of specialized and heterogeneous components, and the emergence of new hardware and software systems.
Computer Organization (計算機組織) or equivalent knowledge are necessary.
無備註
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Labs: ~50% Examinations: 2, ~50%
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| 週次 | 主題 |
|---|---|
| 第 1 週 | Course overview and ISA recap 2025-09-02(二) |
| 第 2 週 | Pipeline and memory hierarchy review 2025-09-09(二) |
| 第 3 週 | Superscalar I 2025-09-16(二) |
| 第 4 週 | Superscalar II 2025-09-23(二) |
| 第 5 週 | VLIW 2025-09-30(二) |
| 第 6 週 | Super-pipelining and branch prediction 2025-10-07(二) |
| 第 7 週 | Advanced caches 2025-10-14(二) |
| 第 8 週 | Midterm 2025-10-21(二) |
| 第 9 週 | Memory management 2025-10-28(二) |
| 第 10 週 | Multithreading 2025-11-04(二) |
| 第 11 週 | Vector processors and GPUs 2025-11-11(二) |
| 第 12 週 | Parallel programming 2025-11-18(二) |
| 第 13 週 | Small multiprocessors 2025-11-25(二) |
| 第 14 週 | Interconnect and large multiprocessors 2025-12-02(二) |
| 第 15 週 | Emerging architectures 2025-12-09(二) |
| 第 16 週 | Final 2025-12-16(二) |
John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, 6th Ed., Morgan Kaufmann Publishers.
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