VLSI實驗
VLSI Labs.
| 節 | 週五 |
|---|---|
5 13:20–14:10 | VLSI實驗 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
This lab class is an appendix of "Introduction to VLSI Design". Student who enroll in this lab must formerly took "Introduction to VLSI Design" or is taking "Introduction to VLSI Design" simultaneously.
Digital Logic Design, Circuit Theory, Microelectronics
無備註
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Lab01 10% Lab02 12% Lab03 14% Lab04 14% Lab05 10% Final Project 20% Onsite Test 10% Final Exam 10%
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| 週次 | 主題 |
|---|---|
| 第 1 週 | 和平紀念日補假 |
| 第 2 週 | Course Introduction + Environment Setting |
| 第 3 週 | Digital Circuit + Introduction to Hspice tool 【Lab01】 1-bit Full-Adder + DFF (Hspice) |
| 第 4 週 | CMOS Technology + Introduction to Layout tool 【Lab02】 1-bit Full-Adder + DFF (Layout) |
| 第 5 週 | Lab01 Demo Lab02 Discussion |
| 第 6 週 | 兒童節補假 |
| 第 7 週 | Schematic Level Design + Logical Effort 【Lab03】 4-bit Full-Adder + DFF |
| 第 8 週 | Lab02 Demo Lab03 Discussion |
| 第 9 週 | 【Onsite Test】 |
| 第 10 週 | 勞動節放假 |
| 第 11 週 | Lab03 Demo Array, Recoded, and Booth Multiplier 【Lab04】 6-bit Booth Encoder |
| 第 12 週 | Lab04 Discussion Cell-based Design + Introduction to Verilog + Architecture Level Design + MAC + Logic Synthesis 【Lab05】6-bit Multiplier and Accumulator |
| 第 13 週 | 【Final Project】Pipeline MAC Design (Team work) |
| 第 14 週 | Lab05 Discussion |
| 第 15 週 | Lab04 Demo Lab05 Demo Final Project Discussion |
| 第 16 週 | 【Final Exam】 |
| 第 17 週 | 端午節放假 2026-06-19(五) |
| 第 18 週 | Final Project Demo 2026-06-26(五) |
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- 地點
- ED415
- 時間
- F567 (13:20 ~ 16:20, Friday)
- 聯絡方式
- 官承旭 posada.ee11@nycu.edu.tw 李秉蓒 xian.ee12@nycu.edu.tw