數位電路設計

This course covers the theory and practice of digital logic design.

None.

無備註

Lecture slides will be released on the E3 system.

Grading is based on four Verilog programming homework (20%), one mid-term exam (40%), and a final exam (40%).

• Digital Systems and Binary Numbers

  1. Introduction to Digital Systems 2. Binary Numbers 3. Number-Base Conversions 4. Binary Logic

  講授：

  3

• Boolean Algebra and Logic Gates

  1. Basic Theorems and Properties of Boolean Algebra 2. Boolean Functions 3. Canonical and Standard Forms 4. Digital Logic Gates

  講授：

  3

• Introduction to Verilog

  1. Introduction 2. Verilog Program Structure 3. Data Types and Control Flows 4. Concept on Concurrency and Timing in Digital Circuits

  講授：

  4

• Gate-Level Minimization

  1. The Map Method 2. Product-of-Sum Simplification 3. Don't-Care Conditions 4. Two-level Logic Implementations

  講授：

  6

• Combinational Logic

  1. Combinational Circuits 2. Combinational Circuits Design Procedure 3. Binary Adder-Subtractor / Decimal Adder 4. Binary Multiplier 5. Decoder/Encoder/Multiplexer

  講授：

  6

• Synchronous Sequential Logic

  1. Sequential Circuits 2. Latches and Flip-Flops 3. State Machine Models 4. State Reduction and Assignment 5. Sequential Circuits Design Procedure

  講授：

  6

• Register and Counters

  1. Registers 2. Shift Register 3. Ripple Counter 4. Synchronous Counter 5. Ring Counter

  講授：

  6

• Memory and Programmable Logic

  1. Memory Devices 2. Memory Address Decoding 3. Error Detection and Correction 4. ROM and Logic Implementations 5. Programmable Logic Array 6. Programmable Array Logic 7. SPLD/CPLD

  講授：

  6

• Advanced Verilog Topics

  1. Synthesizable Verilog Coding 2. System Verilog 3. FPGA and Circuit Implementation

  講授：

  5

M. Morris Mano and Michael D. Ciletti, "Digital Design", 6th Ed, Pearson Education Limited, 2019.

地點

EC718.

時間

Wed. 8:00 - 9:50, Fri. 14:20 - 4:10.

聯絡方式

cjtsai@cs.nycu.edu.tw (03) 573-1628. Campus ext.: 31628