2 項進行中

115-1 選課時程

進行中

  • 初選第一階段 6/15 – 6/18
  • 初選第二階段 6/22 – 6/25
  • 校際選修 進行中 8/24 – 9/18
  • 初選第三階段 8/31 – 9/3
  • 開學後加退選 進行中 9/7 – 9/21
  • 逾期加退選 9/21 – 9/24
選課資源

加入行事曆

選擇訂閱 Google Calendar,或下載通用的 ICS 檔案。

使用 Google Calendar 時,Google 會收到這份課表的公開連結。

電子學(二)

ElectronicsⅡ

學期
114-X
學分
3 學分
當期課號
515209
永久課號
EEDM10014
開課單位
半導體工程學系
授課教師
楊順
校區
光復
類別
必修
上課時間表
週一
週二
5
13:20–14:10
電子學(二)
ED101(光復)
4 節連堂
電子學(二)
ED101(光復)
4 節連堂
6
14:20–15:10
7
15:30–16:20
8
16:30–17:20

* 根據陽明交大上課時間表所列

概述

This high-intensity syllabus condenses a standard 16-week semester into 16 comprehensive sessions (64 hours total). To provide maximum flexibility for referencing materials, the core contents are explicitly mapped to the two most widely adopted international textbooks: Microelectronic Circuits (Sedra and Smith, 8th Edition) and Fundamentals of Microelectronics (Behzad Razavi, 3rd Edition). This ensures students can effectively follow the intense lecture sequence regardless of their primary text choice.

先修科目

ElectronicsⅠ

備註

無備註

教學方式

教師未提供此項資料

評分方式

Weekly Homework & Quizzes: 30% (Assignments are distributed every Tuesday and collected the following Monday to maintain learning continuity). Midterm Examination: 30% (Held during Session 08, 120-minute duration). Final Examination: 40% (Held during Session 16, 150-minute duration).

課程大綱

教師未提供此項資料

週次計畫
週次主題
第 1 週

7/6開始上課

第 2 週

Course Intro & Device: Review Overview of grading policy and intensive schedule; Quick review of BJT and MOSFET physics, large-signal and small-signal equivalent models (Hybrid-π and T-models). MOSFET Single-Stage Amplifiers: Common-Source (CS), Common-Drain (CD), and Common-Gate (CG) amplifiers; Biasing design, small-signal voltage gain, and input/output impedance derivations.

第 3 週

BJT Single-Stage Topologies: Common-Emitter (CE), Common-Collector (CC), and Common-Base (CB) configurations; Amplifiers with source/emitter degeneration and the Resistance Reflection Theorem. Active Loads & Multistage Amps: Comparison between resistor loads and IC Active Loads; Circuit analysis of active-load CS amplifiers; Topologies of multistage cascaded amplifiers and loading effects.

第 4 週

Cascode Amplifier Design: Circuit structures of MOSFET/BJT Cascode Amplifiers; Analysis of high output impedance characteristics, voltage gain expansion, and the shielding effect. Current Sources & Mirrors: Circuit structures and output resistance analysis of basic current mirrors, Wilson current mirrors, and cascode current mirrors; Current steering concepts.

第 5 週

Midterm Review & Exercises: Comprehensive consolidation of single-stage, multistage, cascode amplifiers, and current mirrors; Step-by-step mathematical problem solving. Midterm Examination: [Midterm Exam (2 hours) + Post-Exam Review & Key Concept Discussion (2 hours)].

第 6 週

Differential Amplifiers Intro: Core concepts of Differential Amplifiers; DC biasing, large-signal, and small-signal operation modes of MOS and BJT differential pairs. Differential Gain & CMRR: Differential amplifiers with active loads; Differential-to-single-ended output mechanisms; Investigation of circuit nonidealities including DC offsets and Input Offset Voltage.

第 7 週

Active-Load Diff Pairs & Offsets: Differential amplifiers with active loads; Differential-to-single-ended output mechanisms; Investigation of circuit nonidealities including DC offsets and Input Offset Voltage. Frequency Response Basics: Bode plot fundamentals; Low-frequency response analysis due to external coupling and bypass capacitors; Miller’s Theorem and its applications.

第 8 週

High-Freq Response: Single-Stage: Transistor internal capacitances (Cπ,Cμ,Cgs,Cgd) and high-frequency models; High-frequency cutoff analysis of CS/CE, CG/CB, and CD/CC amplifiers High-Freq Response: Multistage: High-frequency response analysis of multistage cascaded and cascode structures; Application of the Open-Circuit Time-Constants (OCT) method for upper 3-dB frequency (fH) estimation.

第 9 週

Feedback Amps & Stability: Advantages of feedback; Identification and impedance variations of the four feedback topologies; Loop gain (Aβ), stability criteria via Bode plots (Gain/Phase Margin), and Frequency Compensation. Final Examination & Wrap-up: [Comprehensive Final Exam (2.5 hours) focused on Ch. 8, 9, 10 + Concluding Remarks & Feedback (1.5 hours)].

教科書

Sedra and Smith, Microelectronic Circuits, 8th, Oxford, 2020, M. H. Rashid, Microelectronic Circuits, 3rd Ed., Cengage, 2025. B. Razavi, Fundamentals of microelectronics, 3rd Ed., Wiley, 2021.

Office Hours
地點
ED101
時間
TBD
聯絡方式
lucasyang@nycu.edu.tw